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Study PortalCOMP3147Sequential Consistency
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    COMP3147

    Computer Architecture

    Progress0 / 24 done
    Topics24
    1Transistors and Digital logic2Hardware description languages (Verilog)
    3Instruction types and mixes4Addressing modes5RISC vs. CISC architectures6Exceptions in instruction sets
    7Data dependencies8Static scheduling9Pipeline performance analysis
    10Local scheduling11Loop unrolling and Software pipelining12Trace scheduling13Deferred exceptions and Predicated execution14IA64 architecture
    15Dynamical scheduling16Register renaming17Speculative execution18Trace cache
    19Cache coherency20Sequential consistency21Multithreading22Symmetric multiprocessing23Transactional memory
    24GPU programming
    2 min read
    Topic 20 of 24
    Topic Study Note Illustration
    20

    Sequential consistency

    Sequential consistency (SC) is a memory consistency model that defines the order in which memory operations (reads and writes) appear to execute across multiple processors .

    ⭐ Sequential Consistency

    1. Definition

    Sequential consistency (SC) is a memory consistency model that defines the order in which memory operations (reads and writes) appear to execute across multiple processors.

    A system is sequentially consistent if the result of execution is the same as if all operations of all processors were executed in some sequential order, and the operations of each individual processor appear in program order.


    2. Key Points

    1. Global Ordering: All processors agree on the order of memory operations.
    2. Program Order Preservation: Each processor’s own instructions execute in the order specified by its program.
    3. Simplifies reasoning about concurrent programs, since the memory appears linearizable.

    3. Formal Definition (Lamport, 1979)

    A multiprocessor system is sequentially consistent if:

    1. The results of execution are the same as if all memory operations were executed in some sequential order.
    2. Each processor’s operations appear in the sequence in the order specified by its program.

    4. Example

    Consider two processors P1 and P2, sharing variables X and Y initially 0:

    Processor 1 Processor 2
    X = 1 Y = 1
    r1 = Y r2 = X

    Sequentially consistent outcomes:

    • r1 = 0, r2 = 1
    • r1 = 1, r2 = 0
    • r1 = 1, r2 = 1

    Not allowed under SC:

    • r1 = 0, r2 = 0 → violates sequential consistency because there is no sequential ordering where both reads return 0 after writes.

    5. Importance

    1. Predictable behavior: Makes it easier to reason about concurrent programs.
    2. Foundation for multiprocessor memory systems: Ensures correctness in shared memory architectures.
    3. Simplifies programming model: Programmers can assume a “single, global” order of memory operations.

    6. Limitations

    1. Performance Overhead: Enforcing sequential consistency may require stalls, memory fences, or strict ordering, which reduces performance.
    2. Not required by modern processors: Many modern multiprocessors use relaxed consistency models (e.g., TSO, weak consistency) for higher performance.
    3. Harder to implement in out-of-order execution or multithreaded caches without special mechanisms.

    7. Relation to Other Concepts

    Concept Relation to SC
    Memory Consistency Models SC is the strictest model, others relax ordering to improve performance.
    Cache Coherency SC assumes that caches maintain correct order of reads/writes across processors.
    TLP / Multithreading SC defines legal outcomes when multiple threads access shared memory.

    8. Exam-Friendly Summary

    • Sequential Consistency: Memory operations appear as if executed in some global sequential order, while preserving program order per processor.
    • Benefits: Predictable, simple reasoning for shared memory programs.
    • Limitations: Performance overhead; relaxed models are often used in practice.
    ← Previous topic 19
    Thread-Level Parallelism: Cache coherency
    Next topic 21 →
    Multithreading

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