⭐ Addressing Modes

Definition

Addressing modes are the different ways in which a CPU identifies the location of operands (data) required for an instruction.

An operand may be located:

• Inside a register
• In memory
• Within the instruction itself
• Relative to another address

Addressing modes give flexibility to the programmer and allow the instruction set to express a wide variety of operations.

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⭐ Why Addressing Modes Are Important?

• Provide efficient ways to access data
• Reduce the number of instructions needed
• Support complex data structures like arrays, pointers, and stacks
• Improve compiler efficiency
• Make instructions more flexible

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⭐ Common Addressing Modes

Below are the most widely used addressing modes across architectures like MIPS, ARM, x86, RISC-V etc.

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1. Immediate Addressing Mode

Definition

The operand is directly specified inside the instruction.

Example:

ADD R1, R2, #5     ; R1 = R2 + 5

Usage:

• Constants
• Small immediate values
• Fast execution (no memory read)

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2. Register Addressing Mode

Definition

The operand is located in a register.

Example:

ADD R1, R2, R3     ; R1 = R2 + R3

Usage:

• Fastest access
• Used heavily in RISC architectures

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3. Direct (Absolute) Addressing Mode

Definition

The instruction directly contains the memory address of the operand.

Example:

LOAD R1, 5000     ; R1 = Mem[5000]

Usage:

• Accessing static variables
• Simple but not flexible

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4. Indirect Addressing Mode

Definition

The instruction specifies a register (or memory location) that contains the address of the operand.

Example:

LOAD R1, (R2)     ; R1 = Mem[ R2 ]

If R2 = 3000, it loads from Mem[3000].

Usage:

• Pointers
• Dynamic data structures

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5. Indexed Addressing Mode

Definition

The effective address is calculated by:

Base Address + Index Register

Example:

LOAD R1, 200(R2)   ; R1 = Mem[200 + R2]

Usage:

• Arrays
• Table lookups

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6. Base + Offset Addressing Mode

Definition

A constant offset is added to a base register.

Example:

LOAD R1, 4(R3)    ; R1 = Mem[R3 + 4]

Usage:

• Accessing structure fields
• Stack frames

(Indexed and Base+Offset are very similar; RISC uses Base+Offset most.)

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7. Relative (PC-Relative) Addressing Mode

Definition

The effective address is calculated relative to the Program Counter (PC).

Example:

BEQ R1, R2, LABEL    ; Jump to PC + offset

Usage:

• Branch instructions
• Position-independent code
• Short jumps

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8. Auto-Increment and Auto-Decrement Addressing

Definition

Address used for operand is taken from a register, and the register is automatically incremented or decremented.

Auto-increment Example:

LOAD R1, (R2)+     ; R1 = Mem[R2], then R2 = R2 + 1

Auto-decrement Example:

PUSH (–R2)         ; R2 = R2 – 1, then Mem[R2] = value

Usage:

• Stack operations
• Iterating through arrays
• Used in older architectures (e.g., PDP-11)

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9. Displacement Addressing Mode

Definition

Operand address = register + constant displacement

Basically the same as base + offset, but used generally for:

• Stack frames
• Local variables
• Function parameters

Example:

LOAD R1, 8(RBP)    ; Load local variable at offset 8

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10. Memory Indirect Addressing Mode

Definition

The instruction first accesses memory to get an address, then uses that address to get the operand.

Example:

LOAD R1, @(5000)      ; R1 = Mem[ Mem[5000] ]

Usage:

• Pointer to pointer
• Linked structures

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⭐ Summary Table (Exam-Friendly)

Addressing Mode	Operand Location	Example	Usage
Immediate	In instruction	ADD R1, #5	Constants
Register	Register	ADD R1, R2	Fast ops
Direct	Memory address in instruction	LOAD R1, 5000	Simple access
Indirect	Register holds address	LOAD R1, (R2)	Pointers
Indexed	Base + index	LOAD R1, 100(R3)	Arrays
Base + Offset	Register + offset	LOAD R1, 4(R2)	Structures, stack
PC-relative	PC + offset	BEQ label	Branching
Auto-inc/dec	Reg used then updated	LOAD R1, (R2)+	Stacks
Memory Indirect	Mem contains address	LOAD R1, @(A)	Pointer chains

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⭐ Why Addressing Modes Matter in ISA Design

• Support for high-level language constructs
• Improves CPU flexibility
• Reduces code size
• Enables efficient array, stack, and structure access
• Helps optimize instruction execution