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    Digital Logic Design
    CC-110
    Progress0 / 63 topics
    Topics
    1. Introduction to Digital Systems2. Number Systems3. Introduction to Boolean Algebra4. Basic theorems and properties of Boolean Algebra5. Boolean Functions6. Logic Gates7. NAND and NOR Implementation8. Representation of Function in Sum of Minterms or Product of Maxterms9. Simplification of Boolean function using Karnaugh Map10. Don't care Conditions11. The Tabulation Method12. Introduction to Combinational Logic13. Design of Adders14. Design of Subtractors15. Code Convertors16. Analysis Procedure of Combinational Circuits17. Binary Parallel Adders18. Decimal Adders19. Magnitude Comparator20. Decoders and its applications21. Multiplexers22. Demultiplexers23. Encoders24. ROM25. Programmable Logic Array (PLA)26. Introduction to Sequential Circuits27. Basic Flip Flop28. Clocked RS Flip Flop29. Clocked D Flip Flop30. Clocked JK Flip Flop31. Clocked T Flip Flop32. Analysis of Clocked Sequential Circuits33. State Reduction and Assignment34. Flip Flop Excitation tables35. Design Procedure36. Design of Counters37. Design with State Equations38. Introduction to Registers39. Shift Registers40. Ripple Counters41. Synchronous Counters42. Timing Sequences43. Memory Unit44. Random Access Memory45. Introduction to Programmable Logic Devices (CPLD, FPGA)46. Lab Assignments using tools such as Verilog HDL/VHDL, MultiSim47. Familiarization with Digital Electronic Trainer48. Logic gates operations49. Half Adder Operation50. Full Adder Operation51. Half Subtractor Operation52. Full Subtractor Operation53. 7-Segment Display Operation54. Decoder Operation55. BCD To 7-Segment Display56. Multiplexer Operation57. Using Multiplexer and Demultiplexer/Decoder58. Multiplexing 7-Segment Displays59. Comparator Operations60. D Latch and Flip-Flop Operation61. Latching BCD Data for Displaying On 7-Segment Display62. JK Flip-Flop Operation63. Random Access Memories
    CC-110›NAND and NOR Implementation
    Digital Logic DesignTopic 7 of 63

    NAND and NOR Implementation

    7 minread
    1,210words
    Intermediatelevel

    NAND and NOR Gate Implementation

    Both NAND and NOR gates are universal gates in digital logic design. This means that any Boolean function can be implemented using only NAND gates or only NOR gates. They are particularly useful in digital circuits because they are simple to construct and, in many cases, can reduce the cost and complexity of a circuit.

    1. NAND Gate Implementation

    The NAND gate is the negation of the AND gate. It outputs 0 only when both inputs are 1, and outputs 1 for all other combinations of inputs.

    Truth Table for NAND Gate:

    A B A ⊼ B
    0 0 1
    0 1 1
    1 0 1
    1 1 0

    Symbol:

    The symbol for the NAND gate is the same as the AND gate, but with a small circle (inversion) at the output.

    Boolean Expression for NAND:

    F=A NAND B=A∧B‾F = A \, \text{NAND} \, B = \overline{A \land B}F=ANANDB=A∧B

    Implementation Using NAND Gates:

    Since the NAND gate is universal, any Boolean function can be implemented using only NAND gates. Here are some common logic gates implemented using only NAND gates:

    • NOT Gate using NAND:

      • A NOT gate is simply the negation of the input.

      • To implement a NOT gate using NAND, connect both inputs of the NAND gate to the same variable: ¬A=A NAND A=A∧A‾=A‾\neg A = A \, \text{NAND} \, A = \overline{A \land A} = \overline{A}¬A=ANANDA=A∧A=A

      • Implementation:

        • Input A → Both inputs of the NAND gate.
        • Output = NOT A.
    • AND Gate using NAND:

      • An AND gate can be created by using a NAND gate followed by a NOT gate.

      • AND using NAND: A∧B=A NAND B‾A \land B = \overline{A \, \text{NAND} \, B}A∧B=ANANDB

        • Implementation:
          1. First, use a NAND gate to compute A NAND BA \, \text{NAND} \, BANANDB.
          2. Then, pass the output through a second NAND gate with both inputs connected to the output of the first gate.
      • Circuit:

        • First NAND gate: Inputs A and B → Output: A NAND BA \, \text{NAND} \, BANANDB
        • Second NAND gate: Inputs A NAND BA \, \text{NAND} \, BANANDB and A NAND BA \, \text{NAND} \, BANANDB → Output: A∧BA \land BA∧B.
    • OR Gate using NAND:

      • An OR gate can be constructed by using the De Morgan's Law: A∨B=A‾∧B‾‾A \lor B = \overline{\overline{A} \land \overline{B}}A∨B=A∧B

      • Using NAND gates, the expression becomes: A∨B=(A NAND A) NAND (B NAND B)A \lor B = (A \, \text{NAND} \, A) \, \text{NAND} \, (B \, \text{NAND} \, B)A∨B=(ANANDA)NAND(BNANDB)

      • Implementation:

        • First NAND gate: Input A and A → Output: ¬A\neg A¬A
        • Second NAND gate: Input B and B → Output: ¬B\neg B¬B
        • Third NAND gate: Inputs from the two previous gates → Output: A∨BA \lor BA∨B.

    2. NOR Gate Implementation

    The NOR gate is the negation of the OR gate. It outputs 1 only when both inputs are 0, and it outputs 0 for all other combinations of inputs.

    Truth Table for NOR Gate:

    A B A ⊽ B
    0 0 1
    0 1 0
    1 0 0
    1 1 0

    Symbol:

    The NOR gate symbol is similar to the OR gate symbol, but with a small circle (inversion) at the output.

    Boolean Expression for NOR:

    F=A NOR B=A∨B‾F = A \, \text{NOR} \, B = \overline{A \lor B}F=ANORB=A∨B

    Implementation Using NOR Gates:

    Just like the NAND gate, the NOR gate is also universal, meaning any Boolean function can be implemented using only NOR gates. Below are some common gates implemented using only NOR gates:

    • NOT Gate using NOR:

      • A NOT gate is simply the negation of the input.

      • To implement a NOT gate using NOR, connect both inputs of the NOR gate to the same variable: ¬A=A NOR A=A∨A‾=A‾\neg A = A \, \text{NOR} \, A = \overline{A \lor A} = \overline{A}¬A=ANORA=A∨A=A

      • Implementation:

        • Input A → Both inputs of the NOR gate.
        • Output = NOT A.
    • OR Gate using NOR:

      • An OR gate can be implemented by using a NOR gate followed by a NOT gate.

      • OR using NOR: A∨B=A NOR B‾‾A \lor B = \overline{\overline{A \, \text{NOR} \, B}}A∨B=ANORB

        • Implementation:
          1. First, use a NOR gate to compute A NOR BA \, \text{NOR} \, BANORB.
          2. Then, pass the output through a second NOR gate with both inputs connected to the output of the first gate.
      • Circuit:

        • First NOR gate: Inputs A and B → Output: A NOR BA \, \text{NOR} \, BANORB
        • Second NOR gate: Inputs A NOR BA \, \text{NOR} \, BANORB and A NOR BA \, \text{NOR} \, BANORB → Output: A∨BA \lor BA∨B.
    • AND Gate using NOR:

      • An AND gate can be created by using the De Morgan's Law: A∧B=A‾∨B‾‾A \land B = \overline{\overline{A} \lor \overline{B}}A∧B=A∨B

      • Using NOR gates, the expression becomes: A∧B=(A NOR A) NOR (B NOR B)A \land B = (A \, \text{NOR} \, A) \, \text{NOR} \, (B \, \text{NOR} \, B)A∧B=(ANORA)NOR(BNORB)

      • Implementation:

        • First NOR gate: Input A and A → Output: ¬A\neg A¬A
        • Second NOR gate: Input B and B → Output: ¬B\neg B¬B
        • Third NOR gate: Inputs from the two previous gates → Output: A∧BA \land BA∧B.

    Summary:

    • NAND Gate Implementation: NAND gates can be used to implement any Boolean function. Common gates like AND, OR, and NOT can be implemented using combinations of NAND gates.
    • NOR Gate Implementation: NOR gates are also universal and can be used to implement all other logic gates, such as AND, OR, and NOT.

    By using just NAND gates or NOR gates, entire digital systems can be constructed, making these gates especially useful in simplifying circuit designs and reducing the number of gate types required.

    Previous topic 6
    Logic Gates
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    Representation of Function in Sum of Minterms or Product of Maxterms

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