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    Subject Notes Illustration
    Subject Notes Illustration
    Course Code: CC-11063 Topics

    Digital Logic Design

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    63
    Total Topics
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    0/63 done63 topics
    01
    Introduction to Digital Systems
    02
    Number Systems
    03
    Introduction to Boolean Algebra
    04
    Basic theorems and properties of Boolean Algebra
    05
    Boolean Functions
    06
    Logic Gates
    07
    NAND and NOR Implementation
    08
    Representation of Function in Sum of Minterms or Product of Maxterms
    09
    Simplification of Boolean function using Karnaugh Map
    10
    Don't care Conditions
    11
    The Tabulation Method
    12
    Introduction to Combinational Logic
    13
    Design of Adders
    14
    Design of Subtractors
    15
    Code Convertors
    16
    Analysis Procedure of Combinational Circuits
    17
    Binary Parallel Adders
    18
    Decimal Adders
    19
    Magnitude Comparator
    20
    Decoders and its applications
    21
    Multiplexers
    22
    Demultiplexers
    23
    Encoders
    24
    ROM
    25
    Programmable Logic Array (PLA)
    26
    Introduction to Sequential Circuits
    27
    Basic Flip Flop
    28
    Clocked RS Flip Flop
    29
    Clocked D Flip Flop
    30
    Clocked JK Flip Flop
    31
    Clocked T Flip Flop
    32
    Analysis of Clocked Sequential Circuits
    33
    State Reduction and Assignment
    34
    Flip Flop Excitation tables
    35
    Design Procedure
    36
    Design of Counters
    37
    Design with State Equations
    38
    Introduction to Registers
    39
    Shift Registers
    40
    Ripple Counters
    41
    Synchronous Counters
    42
    Timing Sequences
    43
    Memory Unit
    44
    Random Access Memory
    45
    Introduction to Programmable Logic Devices (CPLD, FPGA)
    46
    Lab Assignments using tools such as Verilog HDL/VHDL, MultiSim
    47
    Familiarization with Digital Electronic Trainer
    48
    Logic gates operations
    49
    Half Adder Operation
    50
    Full Adder Operation
    51
    Half Subtractor Operation
    52
    Full Subtractor Operation
    53
    7-Segment Display Operation
    54
    Decoder Operation
    55
    BCD To 7-Segment Display
    56
    Multiplexer Operation
    57
    Using Multiplexer and Demultiplexer/Decoder
    58
    Multiplexing 7-Segment Displays
    59
    Comparator Operations
    60
    D Latch and Flip-Flop Operation
    61
    Latching BCD Data for Displaying On 7-Segment Display
    62
    JK Flip-Flop Operation
    63
    Random Access Memories

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