Half adder, full adder

Half Adder and Full Adder

In digital logic circuits, adders are essential for performing binary addition. A half adder and a full adder are both combinational logic circuits that perform the addition of binary numbers. Let's look at both in detail.

---

1. Half Adder

A half adder is a basic digital circuit that adds two single-bit binary numbers. It has two inputs and two outputs:

• Sum (S)
• Carry (C)

Truth Table for Half Adder:

Input A	Input B	Sum (S)	Carry (C)
0	0	0	0
0	1	1	0
1	0	1	0
1	1	0	1

Explanation:

• The Sum (S) is the result of the addition of the two bits (A and B).
• The Carry (C) is 1 if both A and B are 1, otherwise it is 0.

Logic Equations:

• Sum (S) = A ⊕ B (A XOR B)
• Carry (C) = A · B (A AND B)

Circuit Design for Half Adder:

• The Sum output is obtained by using an XOR gate between the inputs A and B.
• The Carry output is obtained by using an AND gate between the inputs A and B.

Diagram of Half Adder:

     A ───┐
           │
           │   XOR   ─── Sum
     B ───┘──────┐
                  │
                  │   AND    ─── Carry
                  └──────────┘

---

2. Full Adder

A full adder is a more advanced circuit that adds three binary bits. It has three inputs:

• A (First bit)
• B (Second bit)
• Cin (Carry input from previous stage)

It produces two outputs:

• Sum (S)
• Carry (Cout) (Carry output for the next stage)

Truth Table for Full Adder:

A	B	Cin	Sum (S)	Cout
0	0	0	0	0
0	0	1	1	0
0	1	0	1	0
0	1	1	0	1
1	0	0	1	0
1	0	1	0	1
1	1	0	0	1
1	1	1	1	1

Explanation:

• The Sum (S) is the result of the addition of the three inputs (A, B, and Cin), and the output is the least significant bit of the sum.
• The Carry (Cout) is the carry bit that is generated when the sum of the three inputs exceeds 1.

Logic Equations:

• Sum (S) = A ⊕ B ⊕ Cin (A XOR B XOR Cin)
• Carry (Cout) = (A · B) + (B · Cin) + (A · Cin) (A AND B OR B AND Cin OR A AND Cin)

Circuit Design for Full Adder:

The full adder can be constructed using:

1. XOR gates to calculate the sum.
2. AND gates to calculate the carry.
3. OR gate to combine the carry outputs.

Diagram of Full Adder:

     A ───┐
           │
           │   XOR   ─── Sum
     B ───┘──────┐
                  │
           ┌──────┴──────┐
           │             │
           │             │
     Cin ───┘         AND ─── Cout
                           │
                           OR
                           │
                           └─ Carry out

---

3. Difference Between Half Adder and Full Adder

Feature	Half Adder	Full Adder
Inputs	2 inputs (A and B)	3 inputs (A, B, Cin)
Outputs	2 outputs (Sum and Carry)	2 outputs (Sum and Carry out)
Carry Input	No carry input (only A and B)	Has carry input (Cin)
Used In	Simple binary addition	Multi-bit binary addition (used in chained adders)
Complexity	Simple design with basic gates	More complex, requires XOR, AND, OR gates

---

4. Use of Full Adder in Multi-Bit Addition

In multi-bit binary addition, full adders are used in a cascaded manner to add multiple bits. Each full adder adds two corresponding bits from the input binary numbers and a carry input from the previous full adder. The carry output of each full adder is passed as the carry input to the next full adder.

For example, to add two 4-bit binary numbers:

  A3 A2 A1 A0
+ B3 B2 B1 B0
---------------
  S3 S2 S1 S0  (Sum)
Carry Out

• Full adder 1 will add A0 + B0 + Cin (carry input) to produce the least significant bit (S0) and the carry-out (Cout).
• Full adder 2 will add A1 + B1 + Cout from the previous stage to produce the next sum (S1) and the new carry-out (Cout).
• The process continues until the final sum and carry-out are obtained.

---

Conclusion

• Half Adder is a simple circuit that adds two single-bit binary numbers and provides a sum and a carry output.
• Full Adder extends the half adder by adding a third input (carry input from a previous stage) and provides both a sum and a carry output, making it suitable for multi-bit binary addition.
• Full adders are essential for performing binary addition in processors and other digital systems, and they can be cascaded to add multi-bit numbers.