The Y86 Instruction Set Architecture

Processor Architecture: The Y86 Instruction Set Architecture

The Y86 (pronounced "Why Eighty-Six") is a simplified version of the x86 architecture, designed specifically for educational purposes to help students understand processor architecture and instruction set design. It is often used in computer organization courses to teach the concepts behind real-world architectures without the complexity of full-fledged systems like x86 or ARM.

The Y86 architecture is intentionally stripped down to allow for easier understanding, but it still retains many of the core features that make it useful for teaching. It uses a reduced instruction set, simpler memory addressing modes, and fewer registers, compared to modern processor architectures. Let's break down the key components of the Y86 instruction set architecture (ISA) and how it works at the processor level.

1. Overview of Y86 Architecture

The Y86 is a 32-bit processor architecture, and it is based on a RISC (Reduced Instruction Set Computing) design. This means it uses a relatively small set of instructions, with an emphasis on efficient and predictable execution. The architecture supports a set of general-purpose registers, a simple memory model, and an efficient instruction pipeline.

Some of the primary components of the Y86 architecture include:

• Registers: A set of general-purpose registers.
• Memory: A linear address space that is read and written to during program execution.
• Instruction Set: A small, simplified set of instructions.
• Program Counter (PC): Keeps track of the current instruction being executed.
• Condition Codes: Flags that indicate the result of the last arithmetic or logic operation.

2. Y86 Register Set

The Y86 processor has 8 general-purpose registers. These registers are used for storing temporary data, addresses, or computation results during program execution. The registers in Y86 are:

In addition to these general-purpose registers, there are some condition codes that store flags about the outcome of the last operation:

• ZF (Zero Flag): Set if the result of the last operation was zero.
• SF (Sign Flag): Set if the result of the last operation was negative.
• OF (Overflow Flag): Set if there was an overflow in the last operation.

These condition flags are important for making decisions during program execution, especially for conditional jumps.

3. Y86 Memory Model

The Y86 architecture uses a linear memory model, which means that memory is accessed through a flat address space. The processor’s memory is typically modeled as a large contiguous block of memory, and it can be accessed with both direct addresses and offsets (for example, using registers as pointers).

• Memory Addressing: Memory addresses are represented as 32-bit values. There is no segmentation or paging in Y86, simplifying memory management.
• Stack: The stack in Y86 is used for function calls and local variable storage. It grows downwards, with the stack pointer (%esp) pointing to the top of the stack. The stack is a key part of the Y86’s function calling convention.

4. Y86 Instruction Set

The Y86 instruction set is designed to be much simpler than the x86 instruction set, and it contains a reduced number of instructions. These instructions can be classified into several categories: data movement, arithmetic and logic, control flow, and program control.

a) Data Movement Instructions

• irmovl: Immediate to register move.

  • Format: irmovl $val, %reg
  • This instruction moves an immediate value ($val) into a general-purpose register (%reg).

• rmmovl: Register to memory move.

  • Format: rmmovl %reg, mem
  • This instruction stores the value from the register (%reg) into memory at the specified address (mem).

• mrmovl: Memory to register move.

  • Format: mrmovl mem, %reg
  • This instruction loads a value from memory at address mem into the register %reg.

b) Arithmetic and Logic Instructions

• addl: Integer addition.

  • Format: addl %reg1, %reg2
  • This instruction adds the value in register %reg1 to the value in register %reg2, storing the result in %reg2.

• subtl: Integer subtraction.

  • Format: subtl %reg1, %reg2
  • This instruction subtracts the value in register %reg1 from the value in %reg2, storing the result in %reg2.

• andl: Bitwise AND.

  • Format: andl %reg1, %reg2
  • This instruction performs a bitwise AND operation between the values in %reg1 and %reg2, storing the result in %reg2.

• xorl: Bitwise XOR.

  • Format: xorl %reg1, %reg2
  • This instruction performs a bitwise XOR operation between the values in %reg1 and %reg2, storing the result in %reg2.

c) Control Flow Instructions

• jmp: Unconditional jump.

  • Format: jmp dest
  • This instruction unconditionally jumps to the address dest, where execution continues.

• jle: Jump if less than or equal (conditional jump).

  • Format: jle dest
  • This instruction jumps to dest if the result of the previous arithmetic operation was less than or equal to zero (checked by the condition codes).

• je: Jump if equal (conditional jump).

  • Format: je dest
  • This instruction jumps to dest if the result of the previous operation was zero.

• call: Call a subroutine (function).

  • Format: call dest
  • This instruction pushes the address of the next instruction onto the stack and jumps to the destination dest.

• ret: Return from subroutine.

  • Format: ret
  • This instruction pops the return address from the stack and jumps back to the calling function.

d) Program Control Instructions

• halt: Program halt.
  • Format: halt
  • This instruction stops the program and terminates execution.

5. Y86 Instruction Format

Each Y86 instruction is made up of a single byte that specifies the operation, followed by operands (if any). The instructions are relatively simple compared to more complex instruction sets like x86, which allows for easy understanding and implementation of a processor based on Y86.

For example, the instruction irmovl $7, %eax moves the immediate value 7 into the register %eax. The instruction jmp is an unconditional jump and is followed by the address to jump to.

6. Y86 Program Execution

The Y86 processor fetches instructions from memory, decodes them, and executes them in a pipelined fashion. A simple pipeline architecture is used to process these instructions:

1. Fetch: The instruction is fetched from memory at the address specified by the program counter (PC).
2. Decode: The instruction is decoded to determine the operation and operands.
3. Execute: The operation specified by the instruction is executed, such as an arithmetic operation or memory access.
4. Memory Access: If the instruction requires reading or writing memory, this step is performed.
5. Writeback: The result of the operation is written back to the destination register or memory.

7. Conclusion

The Y86 instruction set architecture is a simplified educational architecture that helps students understand the basic principles of computer organization and the interaction between hardware and software. It reduces the complexity of real-world architectures while still covering key concepts like registers, memory access, and control flow. By working with Y86, students can focus on understanding the fundamental ideas behind how processors execute instructions, how data flows through the machine, and how various machine-level operations are carried out.