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    Current Subject
    🧩
    Compiler Construction
    COMP3149
    Progress0 / 32 topics
    Topics
    1. Introduction to interpreter and compiler2. Structure of a Compiler and its Phases3. Lexical Analyzer and Input Buffering4. Specifications and Recognitions of Tokens5. Regular Expressions and Finite Automata6. Transition Table and Transition Graph7. Definitions of Grammars, Derivations, and Parse Trees8. Ambiguity, Associativity, and Precedence of Operators9. Syntax Analysis and Role of the Parser10. Eliminating Ambiguity, Left Recursion, and Left Factoring11. Top-Down Parsing and Recursive-Descent Parsing12. First and Follow Sets13. LL(1) Grammars and Non-recursive Predictive Parsing14. Bottom-Up Parsing: Reductions and Shift-Reduce Parsing15. LR Parsing and LR(0) Parsers16. LR(0) Automaton and Parsing Table17. Shift-Reduce Conflicts18. SLR(1) Parsers: Automaton and Parsing Table19. LR(1) Parsers: Automaton and Parsing Table20. LALR Parsing: Automaton and Parsing Table21. Semantic Analysis and Intermediate Code Generation22. Three Address Code23. Tasks of Semantic Analyzer and Types of Errors24. Type Checking and Environments25. Type Conversions: Implicit vs Explicit26. Back Patching and Switch Statements27. Storage Organization and Stack Allocation of Space28. Heap Management and Optimization29. Code Generation: Design of a Code Generator30. Target Language and Addresses in Target Code31. Basic Blocks and Flow Graphs32. Optimization of Basic Blocks
    COMP3149›Code Generation: Design of a Code Generator
    Compiler ConstructionTopic 29 of 32

    Code Generation: Design of a Code Generator

    4 minread
    714words
    Beginnerlevel

    🧠 Code Generation: Design of a Code Generator (Compiler Construction)

    Code generation is the final major phase of a compiler where intermediate code is converted into target machine code or assembly code.


    📌 1. Code Generation

    📖 Definition

    Code generation is the process of converting intermediate representation (IR) of a program into target machine code.

    👉 It produces executable code for the CPU.


    🧠 Input and Output

    Input Output
    Intermediate Code (TAC, DAG, etc.) Machine / Assembly Code

    📊 Basic Code Generator Structure

    Intermediate Code
            ↓
    Code Generator
            ↓
    Target Machine Code
    

    🧠 2. Design of a Code Generator

    📖 Definition

    The design of a code generator refers to how the compiler component converts IR into efficient machine code while considering correctness, speed, and memory usage.


    ⚙️ Main Goals of Code Generator

    ✔ Correct output ✔ Fast execution ✔ Efficient memory usage ✔ Minimal instructions ✔ Proper register usage


    🧠 3. Major Tasks of Code Generator

    🔹 1. Instruction Selection

    Choosing correct machine instructions for IR.

    Example:

    t1 = a + b
    

    Machine code:

    MOV R1, a
    ADD R1, b
    

    🔹 2. Register Allocation

    Assign variables to CPU registers.

    👉 Registers are faster than memory.


    🔹 3. Instruction Ordering

    Arrange instructions for better performance.


    🔹 4. Storage Management

    Decide where variables will be stored:

    • Stack
    • Heap
    • Registers

    🔹 5. Code Optimization (Local level)

    Improve generated code without changing meaning.


    🧠 4. Input to Code Generator

    The code generator takes Intermediate Representation (IR) like:

    🔹 Three Address Code (TAC)

    t1 = a + b
    t2 = t1 * c
    

    🧠 5. Target Program

    Output may be:

    • Assembly code
    • Machine code

    Example:

    LOAD R1, a
    ADD R1, b
    STORE t1, R1
    
    LOAD R2, t1
    MUL R2, c
    STORE t2, R2
    

    🧠 6. Issues in Code Generation (Very Important Exam Topic)

    🔴 1. Input Form

    • TAC, DAG, or syntax tree affects output quality

    🔴 2. Target Machine

    • Number of registers
    • Instruction set

    🔴 3. Memory Management

    • Stack / heap usage

    🔴 4. Instruction Cost

    • Some instructions are faster than others

    🔴 5. Register Availability

    • Limited registers → need spilling

    🧠 7. Register Allocation

    📖 Definition

    Assigning variables to CPU registers to reduce memory access.


    🔹 Types:

    1. Static Allocation

    • Done at compile time

    2. Dynamic Allocation

    • Done during execution

    📊 Example:

    a → R1
    b → R2
    c → memory (if registers full)
    

    🧠 8. Simple Code Generation Example

    High-level code:

    x = a + b * c;
    

    Step 1: Intermediate Code

    t1 = b * c
    t2 = a + t1
    x = t2
    

    Step 2: Target Code

    MOV R1, b
    MUL R1, c
    MOV R2, a
    ADD R2, R1
    MOV x, R2
    

    🧠 9. Code Generation Techniques

    🔹 1. Simple Code Generation

    • Direct translation
    • Not optimized

    🔹 2. Optimal Code Generation

    • Minimizes instruction cost
    • Uses registers efficiently

    🧠 10. Peephole Optimization (Important)

    📖 Definition

    A technique that improves small segments of code.


    🔍 Example:

    Before:

    MOV R1, a
    MOV R1, a
    

    After:

    MOV R1, a
    

    🧠 11. Code Generation Strategy (Important Points)

    ✔ Prefer registers over memory ✔ Minimize number of instructions ✔ Avoid redundant operations ✔ Reuse computed values ✔ Reduce memory access


    🧠 12. Code Generator Design Diagram

    Intermediate Code
            ↓
    Instruction Selection
            ↓
    Register Allocation
            ↓
    Instruction Ordering
            ↓
    Target Code Generation
    

    📌 13. Key Exam Points

    ✔ Code generation is final compiler phase ✔ Input = Intermediate Code ✔ Output = Machine/Assembly Code ✔ Main tasks:

    • Instruction selection
    • Register allocation
    • Storage management ✔ Goal = efficient and correct code ✔ Uses TAC as common input

    🎯 Final Exam Definition

    Code generation is the compiler phase that converts intermediate representation of a program into target machine code. The design of a code generator focuses on instruction selection, register allocation, and efficient use of memory and CPU resources to produce optimized executable code.


    📊 FINAL REVISION TABLE

    Concept Description
    Code generation IR → machine code
    Input Intermediate code (TAC)
    Output Assembly / machine code
    Instruction selection Choose machine instructions
    Register allocation Assign variables to registers
    Optimization Improve performance
    Peephole optimization Local code improvement

    If you want next, I can explain:

    • 🔥 Code optimization techniques (global + local)
    • 🔥 DAG-based code generation (very important exam question)
    • 🔥 Register allocation graph coloring method
    • 🔥 OR full 10-mark solved questions

    Just tell 👍

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    Target Language and Addresses in Target Code

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      Word count714
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